gcclinux-kernelarmeabi

Compile Linux kernel for ARM-EABI but with 4-byte large type alignment?


By default, any large type (larger than 4 bytes) will be aligned to 8 bytes on EABI. This means that if function(u32, u64) is called, u32 goes into r0, and u64 is split between r2 and r3, leaving r1 unused.

How can I make the compiler align it on 4-bytes instead? I understand the consequences of this (breaking the ABI) or whatever, but I do not really care. Don't suggest using OABI either as enabling OABI in the kernel configuration disables the support for ARMv7.

With 4-byte alignment, u32 will still go in r0 but the u64 will now be split between r1 and r2.


Solution

  • I expect the correct way to do this would be to recompile the toolchain with a modified definition of EABI, which you might partially crib from the the OABI you don't want to use.

    You may have to re-write some of assembly language parts of the kernel too, so it might be better if you gave your modified ABI a new name.

    Do expect to spend quite a bit of time understanding and fixing various things it breaks.