sparc

SLL on a double word in SPARC?


Is there a way that I can do a left logical shift on a double word in SPARC assembly?

I have:

ldd [%fp - 8], %l0

to load the 64bit memory address. Note that this is not an integer, merely a sequence of bytes, so the left logical shift is not acting as a multiplication.


Solution

  • Fundamentals of Computer Organization and Design Page 988 (You can look it up on google books):

    sllx Rs1,Rs2,Rd 
    

    Left shifts a 64 bit value Rs1 by the 6 least significant bits of Rs2 and stores it in Rd. Many of the instructions from Sparc v8 are postfixed with an x to denote the 64bit version of that instruction. For instance sllx, srax, srlx...

    By the way, I just came across this document which seems much easier to get bits of info from that the Sparc v9 manual itself: https://openresearch-repository.anu.edu.au/bitstream/1885/40814/3/TR-CS-00-03.pdf