Again something about lock free...
Suppose I implement a simple array based circular FIFO of integers. The FIFO is accessed by 2 threads single producer, single consumer. The read and write indexes are always updated AFTER the item is accessed. On a single CPU this would be safe ( assuming the update operation of the indexes is atomic ), since only one thread has write access to an index. On an SMP machine this may cause problems due to the fact that both CPU's might see a different representation of the index due to its cache and reordering.
QT has cross platform atomic variables which also implement a memory fence, would the use of an QAtomicInt make the fifo implementation SMP safe or am I overlooking something ?
It would be safe, provided the rest of your implementation is sound.
As you mention, QAtomicInt implements memory fences that prevent instruction re-ordering, and this also enforces cache coherence between processors (in fact the caches of x86 and x86_64 processors are all coherent anyway, though the coherence protocol can cause pipeline stalls and reduce performance if you're relying on it in a tight loop).