[SOLVED] Overflow in "addi" instruction of MIPS

Overflow in "addi" instruction of MIPS - Examples

I realize that addi instruction causes an overflow exception. I am currently using Bluespec HDL to simulate processors that cause exceptions and handle them appropriately.

Any way, I am writing some test cases to trigger the overflow exception in particular using the addi command of MIPS.

Note: The processors I am testing with are SMIPS based, but I support some MIPS instructions for purposed like Exceptions and Interrupts.

I know my logic for detecting overflow is correct (pseudocode below):

if (function == Addi) begin
  if(( a < 0 && b < 0 && result >= 0) || (a >0 && b > 0 && result < 0))
    return True;
  else 
   return False;
end

Question: What can be an example of an overflow: I am trying the following:(inline assembly using __asm__)

 addi $2, $0, 0x7fff
 addi $3, $2, 0x000f

and this is not throwing an exception. And if I try this:

 addi $2, $0, 0x7fffffff
 addi $3, $2, 0x0000000f

I get an assembler error because the immediate has to be 16-bits. How can I get an overflow from andi? can you give me good examples... Do I need to use other instructions to fill up high order bits?

Thank You

Solution

Your first sequence does not cause an overflow exception because the registers are 32-bit. 32767 + 15 = 32782, well within 32 bits.

You can't load large immediates in a single instruction in MIPS. First use a LUI instruction to load the top 16 bits in, then ADDI (or ORI, or XORI) in the lower 16 bits.

You could also LW to bring a 32-bit value in from memory.