Can't compile my system in Qsys

When trying to assemble the system according to the instructions in this document http://www.cs.columbia.edu/~sedwards/classes/2013/4840/lab3.pdf I get this error message:

Error: System.nios2_qsys_0: Reset slave sram_0.avalon_slave_0 not connected to instruction_master.
Error: System.nios2_qsys_0: Exception slave sram_0.avalon_slave_0 not connected to instruction_master.
Error: System.sram.avalon_slave_0: Interface must have an associated clock
Error: System.sram.avalon_slave_0: Interface must have an associated reset
Error: System.leds.avalon_slave_0: Interface must have an associated reset
Error: System.nios2_qsys_0.data_master: leds.avalon_slave_0 (0x0..0x3f) overlaps jtag_uart_0.avalon_jtag_slave (0x0..0x7)
Error: System.nios2_qsys_0.instruction_master: leds.avalon_slave_0 (0x0..0x3f) overlaps jtag_uart_0.avalon_jtag_slave (0x0..0x7)
Error: System.sram.avalon_slave_0: sram.avalon_slave_0 must declare an associated reset
Error: System.leds.avalon_slave_0: leds.avalon_slave_0 must declare an associated reset
Warning: System.leds.reset: Interface has no signals
Warning: System.sram: sram.conduit_end must be exported, or connected to a matching conduit.
Warning: System.leds: leds.conduit_end must be exported, or connected to a matching conduit.
Warning: System.jtag_uart_0: Interrupt sender jtag_uart_0.irq is not connected to an interrupt receiver

Can you tell me what is wrong?

Since the document uses SOPC Builder, you would need to make certain changes so that it works with QSys without errors.

I have listed the fixes for the errors in your question below:

1. Error: System.nios2_qsys_0: Reset slave sram_0.avalon_slave_0 not connected to instruction_master.

   Error: System.nios2_qsys_0: Exception slave sram_0.avalon_slave_0 not connected to instruction_master.

   Fix: Connect avalon_slave_0 of the sram to the instruction_master of the nios2_qsys processor.

2. Error: System.sram.avalon_slave_0: Interface must have an associated clock

   Error: System.sram.avalon_slave_0: Interface must have an associated reset

   Fix: Edit the de2_sram_controller.vhd file and add the following lines to the signal declarations:

   signal clk: in std_logic;

   signal reset_n: in std_logic;

   Then, edit the sram component you created in QSys and add the clk and reset_n signals.

3. Error: System.nios2_qsys_0.data_master: leds.avalon_slave_0 (0x0..0x3f) overlaps jtag_uart_0.avalon_jtag_slave (0x0..0x7)

   Error: System.nios2_qsys_0.instruction_master: leds.avalon_slave_0 (0x0..0x3f) overlaps jtag_uart_0.avalon_jtag_slave (0x0..0x7)

   Fix: In the QSys window, go to System --> Assign Base Addresses.

4. Error: System.leds.avalon_slave_0: Interface must have an associated reset

   Error: System.sram.avalon_slave_0: sram.avalon_slave_0 must declare an associated reset

   Error: System.leds.avalon_slave_0: leds.avalon_slave_0 must declare an associated reset

   Fix: Edit the sram and led components. Under the Interfaces tab make sure Associated Reset has a reset signal (shown in the image below).

5. Warning: System.leds.reset: Interface has no signals

   Fix: Edit the led component. Under the Interfaces tab, towards the bottom, click Remove Interfaces With No Signals.

6. Warning: System.sram: sram.conduit_end must be exported, or connected to a matching conduit.

   Warning: System.leds: leds.conduit_end must be exported, or connected to a matching conduit.

   Fix: In the QSys window, for both the sram and led components, under the Export column, ensure you Double-click to export.

7. Warning: System.jtag_uart_0: Interrupt sender jtag_uart_0.irq is not connected to an interrupt receiver

   Fix: Ensure that the avalon_jtag_slave of the jtag_uart_0 is connected to IRQ 31. Refer to the image below and double-click the white circle connecting the jtag_uart_0 to IRQ 31.

I hope this helps.