Hardware design a 3 binary numbers adder

I want to design a binary full adder to add 3 binary numbers , a typical cell of this adder would look like this

Can someone explain why we have 2 carries to the next bit ? regards

Let's look at a particular formula: 0b11 + 0b11 + 0b11 == 0b1001.

The schematic of this would look like:

Adder 0 has the following properties:

• Normal inputs can total to at most 0b11.
• Carried inputs should always be 0b00.
• The maximum output is 0b11 (One carry bit, one output bit).

Adder 1 has the following properties:

• Normal inputs can total to at most 0b11.
• Carried inputs can total to 0b01.
• Maximum output is 0b100 (Two carry bits, one output bit).