u-boot spi initialisation in omap3

I was looking into spi driver in u boot , here is a small snippet from

omap_spi.c

void spi_init(void)
{
gpMCSPIRegs = (MCSPI_REGS *)MCSPI_SPI1_IO_BASE;

unsigned long u, n;

/* initialize the multipad and interface clock */
spi_init_spi1();

/* soft reset */
CSP_BITFINS(gpMCSPIRegs->SYSCONFIG, SPI_SYSCONFIG_SOFTRESET, 1);
for (n = 0; n < 100; n++) {
    u = CSP_BITFEXT(gpMCSPIRegs->SYSSTATUS,
            SPI_SYSSTATUS_RESETDONE);
    if (u)
        break;
}

  ...more code
}

here in omap_spi.h

  #define CSP_BITFINS(var, bit, val) \
      (CSP_BITFCLR(var, bit)); (var |= CSP_BITFVAL(bit, val))

my confusion here is that when they do soft reset , they call this CSP_BITFINS macro. inside this macro all they do is just manipulate bits and fill structures. where do they access that hardware registers to configure ?

If you look further, you'll find that the pointer they are using, gpMCSPIRregs, is volatile and pointing at the memory-mapper hardware registers. The bits they are setting/clearing are in the hardware registers.