Having two time values in VHDL, for example:
constant t_1 : time := 1 us;
constant t_2 : time := 300 ms;
How do I calculate the ratio between the two time values represented in real type?
The ratio, represented with ":", should for example give:
t_1 : t_2 = 3.333333e-006
t_2 : t_1 = 3.000000e+005
The challenge is that VHDL division of two physical types, like doing t_1 / t_2, returns an (universal) integer, thus with a result of 0 for t_1 / t_2, and not the desired values between 0.0 and 1.0.
The solution should be generally applicable, and also work for simulators having minimum time of more than 1 fs.
Modelsim has a modelsim_lib.util package with a to_real() function in it and Aldec has the same in aldec.aldec_tools.
If you need a portable solution that can be used in synthesis for generating constants, I have a timing_ops package that contains a to_real() function along with a host of other time related utilities. The to_real() function makes an intermediate conversion to integer but intelligently handles large values of 64-bit time that exceed the range of the typical 32-bit integer by pre-scaling them. 64-bit integers are supported if available. The conversion function knows what the current time resolution is by using a modified version of the VHDL-2008 resolution_limit function. You will get the best accuracy in the integer conversion when the simulator resolution is as large as possible. At 1fs resolution you may lose some accuracy on large time values. It will preserve the maximum of 53-bits available in the IEEE 64-bit float significand when doing round trip conversion from time -> real -> time.
There are two versions of this package. The main one defines a physical type for frequency and works in Quartus and Vivado (and any simulator) but not XST. A stripped down timing_ops_xilinx removes the physical type to support XST. The logical package name remains timing_ops so your code can still be portable with only a change needed in library mapping.