architecturesparcitaniumrisc

Are IA64 and SPARC chips RISC or CISC architecture?

I have a very basic questions about these architectures

  1. are these architecture RISC-based or CISC-based?
  2. pipeline stages in both
  3. and instruction set format for both

Please help me

Solution
    1. IA64 is a VLIW architecture, which is different from what most people think of as RISC or CISC. Because IA64 tries to move complexity from the hardware to the compiler, it is more RISC than CISC. SPARC is a RISC architecture.
    2. The number of pipeline stages is a attribute of the micro-architecture (implementation), not the architecture. So it varies from design to design. Both the Pentium and Pentium Pro implemented the x86 architecture but have different number of pipe stages.
    3. You can get the instruction set formats on the Web (SPARC) (IA-64).