verilogsystem-verilog

How to check signal drive strength?

How do we check the signal drive strength on wire? Is it possible? Normally, we can only check the logical value of a wire either 1 or 0 using conditional check == or triple equals ===. But it doesn't tell us the strength, e.g. pull, strong or weak etc.

So is there a way to check drive strength? For example, it would be used something like this:

wire a;
//... your a assignment
initial begin
//...
if (a && is_weak1(a)) $display("a is weak 1");
end
Solution

  • Drive strength is shown using the special %v character.

    $display("a is %v" a);

    The values shown by %v

    Strength   Value   %v
supply     7       Su
strong     6       St
pull       5       Pu
large      4       La
weak       3       We 
medium     2       Me
small      1       Sm
highz      0       HiZ

    To check a value for conditional statement in SystemVerilog:

    string str; 
initial begin
  //...
  str = $sformatf("%v", my_net);
  if (a && (str == "We1")) $display("a is weak 1");

    NB: because the value 1 is encoded in the string the check that a is high is redundant and could just be:

    str = $sformatf("%v", my_net);
if (str == "We1") $display("a is weak 1");

    As Greg pointed out the $psprintf is not actually part of the system verilog standard we should use $sformatf instead. IEEE Std 1800-2012 Section 21.3.3 Formatting data to a string.