I wanted to build a small code for 2*1 mux where the inputs come from different modules (to make it more practical), but I'm always getting output as High Impedence ('Z'). Any suggestions?
module mux_using_assign(
din_0 , // Mux first input
din_1 , // Mux Second input
sel , // Select input
mux_out // Mux output
);
input din_0, din_1, sel ;
output mux_out;
wire mux_out;
assign mux_out = (sel) ? din_1 : din_0;
endmodule //End Of Module mux
module ip1();
wire a;
mux_using_assign dut1(.din_0(a));
assign a = 1;
endmodule
module ip2();
wire b;
mux_using_assign dut1(.din_1(b));
assign b = 0;
endmodule
module test();
wire sel ; // Select input
wire mux_out;
ip1 aa(); // tried commenting this and following line also
ip2 bb();
mux_using_assign dut1(.sel(sel),.mux_out(mux_out));
assign sel=1;
endmodule
The problem is that the dut1
instance in each module is a separate instance from the other modules. In other words, each of ip1
, ip2
, and test
have their own dut1
muxer. You'll need to use input/output wires and link them all to a single mux_using_assign
declaration.