[SOLVED] Cortex M3 sequence of operations from power ON(Precisely from 1st machine cycle)

Cortex M3 sequence of operations from power ON(Precisely from 1st machine cycle)

I know that 1st boot code gets executed and , then if Controller is not kept in ISP and CRP, It goes to user code ,Vector table(Loading SP and PC). Can you specify precisely how it goes to boot code.? please provide if any documents were available

Solution

The place to look for is in a Cortex-M3 microcontroller's reference manual, specifically sections about reset and/or boot behaviour. Since you are asking about an NXP microcontroller, I will refer to the LPC176x/5x User Manual as an example.

Section 3.4 "Reset" states that when the internal reset is deasserted, the 2-bit IRC (internal oscillator) wake up counter starts, and once it times out the processor starts to execute the boot code from the ROM. Since the ROM is at a fixed address the CPU is presumably hard wired to jump to the boot code.

Of course, this would vary from microcontroller to microcontroller. As an example, the STM32 series of Cortex-M3 microntrollers from ST appear to execute user code almost immediately after reset, specifically on the 4th cycle of SYSCLK.