I'm interested since this value affects how data structures where I want to use the (awesome) ldrex/strex synchronization primitives are located in memory.
The ARMv7-M Architecture Reference says:
The size of the tagged memory block is called the Exclusives reservation granule. The Exclusives reservation granule is IMPLEMENTATION DEFINED between:
- one word, in an implementation with a == 2
- 512 words, in an implementation with a == 11.
So, for a given implementation such as the STM32F407, I should be able to find the value used. But I can't, in the various documents I've looked through.
Does anybody know? Also, how did you find it?
STM32F407 has a Cortex-M4 core, which means the size of the ERG is actually 4GB.
From the Cortex-M4 TRM:
The local monitor within the processor has been constructed so that it does not hold any physical address, but instead treats any access as matching the address of the previous LDREX. This means that the implemented exclusives reservation granule is the entire memory address range.
The STM32F407 TRM doesn't mention anything about the system implementing an external monitor, so I'd assume it doesn't. Without other CPUs to synchronise against it's not that big a deal anyway - I can't easily think of a good reason for needing to make a read-modify-write atomic against being overwritten by DMA.