How can the control hardware know which registers to read before it completes decoding the instruction?

While going through computer organisation by Hamacher, I came to know about the basic steps and action of the instructions.

Following is the assembly code

ADD RC,RA,RB

And the instruction is as follows-:

1. Fetch the instruction and increment the PC
2. Decode the instruction and read registers RA and RB
3. Compute [RA]+[RB] (executing instruction)
4. Load the result into destination register RC

How can the control hardware know which registers to read before it completes decoding the instruction?

Explanation given as:

This is possible because source register addresses are specified using the same bit positions in all instructions.

I am not getting it. It would be helpful if anyone please share their knowledge!

On machine level each instruction is simply a one or several bytes encoding what PC needs to do. Some bits of this data determines which operation to run (add, subtract, shift, read etc), other bits determines which operands to use. Simple example from simple set of instructions for MIPS32 architecture:

Instr:       add $d,$s,$t
Bit pattern: 000000ss sssttttt ddddd--- --100000
Instr:       sub $d,$s,$t
Bit pattern: 000000ss sssttttt ddddd--- --100010
Instr:       and $d,$s,$t
Bit pattern: 000000ss sssttttt ddddd--- --100100

As you can see, regardless of operation type, bits encoding operands are always on the same position, so CPU can start preparing operands data before it finishes decoding operation type. Don't know if MIPS using this approach as well, but it's helpful in illustrating it.