I am studying about 8085 microprocessor and I came across an instruction - ADC.
In the example, they gave the accumulator [A] = 57H and a register [D] = 33H and initially carry was set, so [CY] = 01H
Instruction: ADC D They added 57H, 33H and 01H
0 1 0 1 1 1 1 1
0 0 1 1 0 0 1 1
0 0 0 0 0 0 0 1
Answer: 1 0 0 1 0 0 1 1.
They said that the sign flag is now set as the MSB contains the higher bit. I do not understand why is the answer considered to be negative, even though an addition operation is conducted.
It's negative by definition. Under two's complement, any number where the top bit is set is a negative number. 57 + 33 + 1 = 8B, which has the top bit set. Therefore it is a negative number.
In your case it's unfortunate that the register isn't large enough to hold the true result. If it were a 16-bit register you'd have computed 0057 + 0033 + 0001 = 008B, which doesn't have the top bit set. If you intended to keep signed numbers about, you've lost information — you can no longer tell whether this is really meant to be decimal 139 or -117. But if you're working purely in unsigned numbers then you can just ignore the sign flag. You know it doesn't apply.
You can also use the overflow flag to check whether the result has the wrong sign. Overflow is set for addition if two positives seemingly produce a negative or if two negatives seemingly produce a positive.
In your case both sign and overflow should be set.