verilogcpu-architectureverilator

Comparison is constant due to unsigned arithmetic error in verilog with verilator


I am using the following logic to implement a 2-bit saturating counter in a bimodal predictor in Verilog and I am also using verilator as follows:

• For each branch, maintain a 2-bit saturating counter:
-if the branch is taken: counter = min(3,counter+1)
-if the branch is not taken: counter = max(0,counter-1)
• If (counter >= 2), predict taken, else predict not taken

module Bimodal(
input clk,
input reset,
input taken, //from ALU unit in execute stage
input branch, //from control unit in decode stage
input [31:0] instrAddr, // current address taken from fetch/decode stage
output reg predicted_taken_or_not);

reg [1:0] saturating_counter [0:1023];


integer i;
parameter max_val = 3 ;
parameter min_val = 0 ;

assign predicted_taken_or_not = saturating_counter[instrAddr[11:2]]>= 2'd2 && branch? 1'd1 : 1'd0;


// write ports to update the 2-bit saturating counter
always @(posedge clk) begin

if(reset) begin
 for(int i=0; i<1024; i++) begin
    saturating_counter[i] = 2'd1;
 end
end

else if (taken) begin
if(max_val>saturating_counter[instrAddr[11:2]]+1)
    saturating_counter[instrAddr[11:2]]<=saturating_counter[instrAddr[11:2]]+1;
else
    saturating_counter[instrAddr[11:2]]<=max_val;
end

else if (~taken) begin
if(min_val>saturating_counter[instrAddr[11:2]]-1)
   saturating_counter[instrAddr[11:2]]<=min_val;
else
    saturating_counter[instrAddr[11:2]]<=saturating_counter[instrAddr[11:2]]-1;
end

end

endmodule

But I am getting following error

%Warning-UNSIGNED: Bimodal.v:36: Comparison is constant due to unsigned arithmetic
%Warning-UNSIGNED: Use "/* verilator lint_off UNSIGNED */" and lint_on around source to disable this message.
%Error: Exiting due to 1 warning(s)
%Error: Command Failed /home/verilator-3.884/verilator_bin -O4 --cc MIPS.v --exe sim_main.cpp

Is there something I am doing wrong?


Solution

  • Remember, regs in verilog are unsigned values, and whatever you assign to a reg is a positive unsigned value. And all the unsined values you compare against zero will be greater than or equal to zero. If you want a signed comparison you can use $signed() directive.

    if(min_val>$signed(saturating_counter[instrAddr[11:2]]-1))