What is the purpose of this module?

module InoutConnect(
                .X1(internal), 
                .X2(internal)
                );


   parameter width = 1;

   inout [ width - 1 : 0 ] internal;
endmodule // InoutConnect

In the above code what is the format used, I know that while instantiating the module .x1 is use to match the variable name but what about module definition. What does it mean here?

it is called explicit port declaration, meaning that the external world will know this port by its explicit names, X1 and X2 in your case, though internally the same port will be known as internal in your case.

So, in your example you connect both ports to the same internal variable (looks bad to me :)) Though, this is one of the possible uses, in particular if you need to identical output ports. The other example is remapping internal structs or arrays to multiple potrts:

module m(
   output .arr1(array[2:0]),
   output .arr2(array[7:3]),
   input logic [7:0] input_array
)
   logic [7:0] array;
   ...
   always_ff @(posedge clk)
       array <= input_array;
   ...
endmodule

So, above you can use your array as the whole internally, but it will have a different representation in the external world.

See 23.2.2.2 ANSI style list of port declarations for more info.