cudacritical-sectiongpu-warp

Thread/warp local lock in cuda


I want to implement critical sections in cuda. I read many questions and answers on this subject, and answers often involve atomicCAS and atomicExch.

However, this doesn't work at warp level, since all threads in the warp acquire the same lock after the atomicCAS, leading to a deadlock.

I think there is a way to have a real lock in cuda by using warp __ballot or __any instructions.

However, after many attempts, I don't get to a satisfying (read working) solution.

Does anyone here have a good answer on that?

ps: i KNOW warp divergence is bad, so don't tell me to change my algorithm.


Solution

  • Atomics can be made to work at the warp level. The hazard with intra-warp negotiation for the lock has to do with how the lock is acquired in relation to how it is released. Questions such as this and this and this point out this hazard, but you should not conflate this as being a limitation of using atomics. The hazard arises as a result of how conditional code is executed on a GPU(*), and dependency between the 2 paths in the conditional construct.

    In order to avoid the above hazard within a warp, it's necessary to break the dependency between the 2 paths in the conditional construct. The acquisition of the lock must be able to proceed independently from the critical section and the release of the lock.

    However, since you desire just coordination within a warp, atomics are overkill. We already have a number of powerful warp communication and coordination mechanisms such as __ballot() that you mention.

    What follows then is a worked example of using __ballot() in a mechanism to ensure that only 1 thread (per warp) will "acquire a lock". Since this is all happening only at the warp level, we once again can leverage this to entirely dispense with the release of the lock. We can know the lock is released when the critical section is complete (since we only need to track completion across a warp).

    This example performs stream compaction at the warp level, using a __ballot() mechanism to ensure that only 1 thread proceeds into the "critical section" at a time:

    $ cat t398.cu
    
    #include <stdio.h>
    #include <stdlib.h>
    
    const int num_threads = 1024;  // should be 1024 or less for this demo
    
    // returns true if the thread acquired the lock
    // will return true for at most 1 thread per warp
    
    __device__ bool warp_lock(int req){
      return ((__ffs(__ballot(req))) == ((threadIdx.x & 31)+1));
    }
    
    __global__ void test_lock(int *pattern, int *result){
    
      __shared__ int done;
      __shared__ int warp_index[32];
      int myreq = pattern[threadIdx.x];
      done = 1;
      if ((threadIdx.x & 31) == 0) warp_index[threadIdx.x>>5] = 0;
      do {
        done = 1;
        __syncthreads();
        // attempt to  "acquire lock"
        bool mylock = warp_lock(myreq);
        // if lock acquired, do "critical section"
        if (mylock){
          done = 0;
          int my_index = (warp_index[threadIdx.x>>5]++) + ((threadIdx.x>>5)*32);
          result[my_index] = threadIdx.x;
          myreq = 0;
          }
        __syncthreads();
        } while (!done);
    }
    
    int main(){
    
      int *h_pattern, *d_pattern, *h_result, *d_result;
      h_pattern = (int *)malloc(num_threads*sizeof(int));
      h_result  = (int *)malloc(num_threads*sizeof(int));
      cudaMalloc(&d_pattern, num_threads*sizeof(int));
      cudaMalloc(&d_result, num_threads*sizeof(int));
      for (int i = 0; i < num_threads; i++) {h_pattern[i] = rand()&1;}
      cudaMemcpy(d_pattern, h_pattern, num_threads*sizeof(int), cudaMemcpyHostToDevice);
      cudaMemset(d_result, 0, num_threads*sizeof(int));
      test_lock<<<1, num_threads>>>(d_pattern, d_result);
      cudaMemcpy(h_result, d_result, num_threads*sizeof(int), cudaMemcpyDeviceToHost);
      printf("index, in, out\n");
      for (int i = 0; i < num_threads; i++)
        printf("%4d, %d, %4d\n", i, h_pattern[i], h_result[i]);
      return 0;
    }
    
    $ nvcc -arch=sm_61 -o t398 t398.cu
    $ cuda-memcheck ./t398
    ========= CUDA-MEMCHECK
    index, in, out
       0, 1,    0
       1, 0,    2
       2, 1,    3
       3, 1,    4
       4, 1,    5
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     764, 0,    0
     765, 1,    0
     766, 0,    0
     767, 0,    0
     768, 1,  768
     769, 0,  772
     770, 0,  773
     771, 0,  776
     772, 1,  778
     773, 1,  780
     774, 0,  783
     775, 0,  787
     776, 1,  792
     777, 0,  795
     778, 1,  796
     779, 0,  798
     780, 1,    0
     781, 0,    0
     782, 0,    0
     783, 1,    0
     784, 0,    0
     785, 0,    0
     786, 0,    0
     787, 1,    0
     788, 0,    0
     789, 0,    0
     790, 0,    0
     791, 0,    0
     792, 1,    0
     793, 0,    0
     794, 0,    0
     795, 1,    0
     796, 1,    0
     797, 0,    0
     798, 1,    0
     799, 0,    0
     800, 0,  803
     801, 0,  804
     802, 0,  805
     803, 1,  806
     804, 1,  807
     805, 1,  808
     806, 1,  810
     807, 1,  812
     808, 1,  813
     809, 0,  814
     810, 1,  815
     811, 0,  816
     812, 1,  817
     813, 1,  820
     814, 1,  826
     815, 1,  829
     816, 1,  831
     817, 1,    0
     818, 0,    0
     819, 0,    0
     820, 1,    0
     821, 0,    0
     822, 0,    0
     823, 0,    0
     824, 0,    0
     825, 0,    0
     826, 1,    0
     827, 0,    0
     828, 0,    0
     829, 1,    0
     830, 0,    0
     831, 1,    0
     832, 1,  832
     833, 1,  833
     834, 0,  838
     835, 0,  839
     836, 0,  842
     837, 0,  843
     838, 1,  844
     839, 1,  847
     840, 0,  849
     841, 0,  850
     842, 1,  851
     843, 1,  852
     844, 1,  853
     845, 0,  856
     846, 0,  857
     847, 1,  859
     848, 0,  863
     849, 1,    0
     850, 1,    0
     851, 1,    0
     852, 1,    0
     853, 1,    0
     854, 0,    0
     855, 0,    0
     856, 1,    0
     857, 1,    0
     858, 0,    0
     859, 1,    0
     860, 0,    0
     861, 0,    0
     862, 0,    0
     863, 1,    0
     864, 1,  864
     865, 1,  865
     866, 0,  867
     867, 1,  868
     868, 1,  869
     869, 1,  871
     870, 0,  873
     871, 1,  874
     872, 0,  875
     873, 1,  877
     874, 1,  881
     875, 1,  882
     876, 0,  885
     877, 1,  887
     878, 0,  888
     879, 0,  890
     880, 0,  891
     881, 1,  893
     882, 1,  894
     883, 0,    0
     884, 0,    0
     885, 1,    0
     886, 0,    0
     887, 1,    0
     888, 1,    0
     889, 0,    0
     890, 1,    0
     891, 1,    0
     892, 0,    0
     893, 1,    0
     894, 1,    0
     895, 0,    0
     896, 0,  897
     897, 1,  898
     898, 1,  899
     899, 1,  902
     900, 0,  904
     901, 0,  907
     902, 1,  908
     903, 0,  910
     904, 1,  913
     905, 0,  919
     906, 0,  921
     907, 1,  922
     908, 1,  927
     909, 0,    0
     910, 1,    0
     911, 0,    0
     912, 0,    0
     913, 1,    0
     914, 0,    0
     915, 0,    0
     916, 0,    0
     917, 0,    0
     918, 0,    0
     919, 1,    0
     920, 0,    0
     921, 1,    0
     922, 1,    0
     923, 0,    0
     924, 0,    0
     925, 0,    0
     926, 0,    0
     927, 1,    0
     928, 1,  928
     929, 0,  931
     930, 0,  933
     931, 1,  935
     932, 0,  936
     933, 1,  938
     934, 0,  939
     935, 1,  942
     936, 1,  944
     937, 0,  945
     938, 1,  946
     939, 1,  948
     940, 0,  949
     941, 0,  950
     942, 1,  951
     943, 0,  954
     944, 1,  958
     945, 1,  959
     946, 1,    0
     947, 0,    0
     948, 1,    0
     949, 1,    0
     950, 1,    0
     951, 1,    0
     952, 0,    0
     953, 0,    0
     954, 1,    0
     955, 0,    0
     956, 0,    0
     957, 0,    0
     958, 1,    0
     959, 1,    0
     960, 0,  962
     961, 0,  964
     962, 1,  965
     963, 0,  966
     964, 1,  967
     965, 1,  968
     966, 1,  971
     967, 1,  972
     968, 1,  973
     969, 0,  977
     970, 0,  979
     971, 1,  985
     972, 1,  987
     973, 1,  988
     974, 0,  991
     975, 0,    0
     976, 0,    0
     977, 1,    0
     978, 0,    0
     979, 1,    0
     980, 0,    0
     981, 0,    0
     982, 0,    0
     983, 0,    0
     984, 0,    0
     985, 1,    0
     986, 0,    0
     987, 1,    0
     988, 1,    0
     989, 0,    0
     990, 0,    0
     991, 1,    0
     992, 0,  993
     993, 1,  994
     994, 1,  995
     995, 1,  997
     996, 0,  999
     997, 1, 1000
     998, 0, 1002
     999, 1, 1004
    1000, 1, 1005
    1001, 0, 1006
    1002, 1, 1007
    1003, 0, 1009
    1004, 1, 1012
    1005, 1, 1018
    1006, 1, 1019
    1007, 1, 1021
    1008, 0, 1022
    1009, 1,    0
    1010, 0,    0
    1011, 0,    0
    1012, 1,    0
    1013, 0,    0
    1014, 0,    0
    1015, 0,    0
    1016, 0,    0
    1017, 0,    0
    1018, 1,    0
    1019, 1,    0
    1020, 0,    0
    1021, 1,    0
    1022, 1,    0
    1023, 0,    0
    ========= ERROR SUMMARY: 0 errors
    $
    

    Note that all threads can proceed thru the "acquire lock" section without any inter-thread dependency (although only one thread at a time will "win"), and note that all threads can proceed thru the "critical section" without any inter-thread dependency.

    (*) Note that this situation is mitigated in Volta (PDF) by independent thread scheduling.