How you can implement the Sign Extended Instruction in VHDL (in ALU) for PIC24? I need to implement the following instructions and I don't have any idea how to implement SE.
LOOP:
mov 0x1020, w1 ; INW0=ff7f
mov 0x1022, w2 ; INW1=8001
ior w2, w2, w3 ; N=1
se w1, w1 ; N=0
REP1:
bra n, REP1
add w1, w1, w5
se w5, w6 , N=1
bra n, CONT1
REP2:
bra rep2
CONT1:
mov w6, 0x1024
bra LOOP
Looking at the Wikipedia page for the PIC24 shows that the SE
instruction has this beahviour:
SE src,dst C Z N dst ← sign_extend(src), copy bit 7 to bits 15:8
Copying bit 7 to bits 15:8 can be done using the concatenation operator (&
), which joins together arrays to make bigger arrays:
dst <= src(7) & src(7) & src(7) & src(7) & src(7) & src(7) & src(7) & src(7) & src(7 downto 0);
This can be made more extensible by splitting this across two lines and using part-selects and an aggregate:
dst <= (others => src(7));
dst(7 downto 0) <= src(7 downto 0);
The first line fills up all the bits of dst
with bit 7 of src
; the second line overwrites bits 7:0 of dst
with bits 7:0 of src
.