I'm working with arm based linux, and start moving to risc-v, and I often see CPU nodes like the following one, in the dts:
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
timebase-frequency = <0x989680>;
cpu@0 {
device_type = "cpu";
reg = <0x0>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
clock-frequency = <0x3b9aca00>;
interrupt-controller {
#interrupt-cells = <0x1>;
interrupt-controller;
compatible = "riscv,cpu-intc";
linux,phandle = <0x1>;
phandle = <0x1>;
};
};
};
I wonder what timebase-frequency
and clock-frequency
refer to and what's the different between both ?
I initially thought you were asking about what the configuration entries mean; for those that do, they are described in Documentation/devicetree/booting-without-of.txt.
Since you are asking about the concept, however;
a timebase register is a register that is incremented at an implementation-dependent frequency - not necessarily once every clock cycle. Its purpose is to be used as a clock source (contrary to e.g. jiffies).