I have an old pc powered by an Intel Core2 Quad CPU@2.4GHz (both Bios and linux dmidecode don't tell more than that), I can add that the CPU belongs to: Family 6, Model 15, Stepping 7(LGA775 socket).
The motherboard does support ECC but I am wondering if the CPU does it also. I can see that the result of the command dmidecode --t cache gives information about L1,L2,L3 and I can see that on L1 and L2 "Error Correction Type: Single-bit ECC" while L3 "Error Correction Type: Unknown".
Given what I observe from L1 and L2, can I conclude that the CPU does support ECC and I could use it for my ZFS NAS?
No, you can't conclude that ECC DRAM is supported or not based on what the internal caches use to protect data in the cache. The two things are unrelated.
You need to check the CPU and motherboard specs to make sure that both support ECC DRAM. (In your case your Core2 doesn't have an onboard memory controller, so the DRAM is connected to the CPU northbridge. It was the last generation to not integrate the DRAM controllers.)
All recent Intel CPUs use ECC in their L2 / L3 caches, but L1D is actually just parity, not ECC. (To support efficient single-byte and unaligned stores without as much ECC overhead.)
Core2Quad doesn't have an L3 cache.
And BTW, its memory bandwidth is significantly worse than a Nehalem or newer with DDR3, which might be an issue for ZFS copying data around a lot. I think memory bandwidth might be part of the bottleneck in my old Core2Duo running an XFS RAID5 which doesn't saturate individual disk bandwidths for sequential read.