x86x86-64hardwareintelgdt

Can there be multiple segment descriptors for one segment?


Could one utilise multiple segment descriptors for a single segment in order to give different privilege levels separate permissions in that segment? For example, allowing ring 2 to read or write to a data segment via one descriptor, and then allowing ring 3 read-only access to the segment via another?


Solution

  • You're basically asking whether the base/limit of different segments can overlap. Yes, of course they can, just like in real mode. Having different privilege levels is not an obstacle to that.

    Full overlap is the normal situation in a 32-bit flat memory model, where CS is a code segment that covers the whole 0..4GB, and DS=ES have a different descriptor for a segment that covers the same range of memory.

    This is no different to having multiple page-tables mapping the same physical page-frame to different virtual addresses.


    x86 guarantees that there are no cache-aliasing problems when one physical address can be accessed through multiple segment:offset or virtual addresses.

    Most x86 microarchitectures use VIPT L1 caches with all the index bits from below the page offset, so they behave like PIPT caches. (And other levels of cache are PIPT). So caching and memory-disambiguation is based on physical address, or at least linear address, making it a non-issue for hardware.