I don't need to use the "stock" CS signals for SPI in BeagleBone Black. Can I just omit their configuration in DTBO to save a couple of GPIOs? In other words, (1) will SPI work properly? (2) may it cause a GPIO conflict? Here is a DTS fragment example for SPI1:
....
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
/* default state has all gpios released and mode set to uart1 */
bb_spi1_pins: pinmux_bb_spi1_pins {
pinctrl-single,pins = <
0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
>;
};
};
};
....
Which kernel driver should I look into to verify? It looks that spidev.c is too high-level.
Thanks for directions!
Since the pin can be unconnected, so it doesn't matter which pin is used if the pinmux is configured to use it for a different purpose. Thus I consider this solved – perfectly works here.
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
. . . .
bb_spi1_pins: pinmux_bb_spi1_pins {
pinctrl-single,pins = <
BONE_P9_31 (PIN_INPUT | MUX_MODE3) // spi1_sclk
BONE_P9_29 (PIN_INPUT | MUX_MODE3) // spi1_d0 (miso)
BONE_P9_30 (PIN_OUTPUT | MUX_MODE3) // spi1_d1 (mosi)
BONE_P9_28 (PIN_OUTPUT | MUX_MODE7) // spi1_cs0
// for spi1_cs0 it has to be MUX_MODE3, but since we want
// to use it as a GPIO we set to MUX_MODE7, which
// corresponds to GPIO3_14
>;
};
. . . .
}
}
The code snippet above contains macros from Robert Nelson's overlays collection and build suite.