FPGA IO configuration: Effect of weak pull up/down on an output
What is the effect of configuring a pull mode on a pin designated as output in the synthesis?
Does the pull mode still take effect?
Is its use only apparent if we set the output to tristate?
See the example below with a Lattice Diamond tool, I am able to configure the pull mode for an output.
Solution
It only has an effect on the output when the pin is in tristate. If you configure a weak pullup, I assume it burns some power if you drive the output low, and vice versa for weak pulldowns.
I prefer to configure an explicit IO buffer in order to make the tristate control explicit, but that is just a stylistic preference.
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