stm32spi

One bit shift in SPI communication on STM32H7


I'm working on SPI communication between two Nucleo-H743ZI boards. I'm using ST's HAL, and the SPI polling API HAL_SPI_TransmitReceive.

It's working fine until a bandwith of 12Mbits/s (SPI kernel clock at 200Mhz and prescaler 16, the CPU is always at 400Mhz) but fails above (smaller prescaler).

I want to understand since 24 or 48 Mbits/s doesn't seem much even in polling with a poor quality software.

With prescaler set to 8, I don't have SPI error like overrun or other (I checked directly in registers), however the data are not correct. looking closer to the data, I've noticed that there is only a shift of one bit.

More precisely I should receive (in hexa ): 0x30 0x31 0x32 ... And I receive 0x18 0x18 0x99...

In binary:

If I shift the received bitstream to the left I get exactly the right result.

Does it ring something to you ? Could it be due to a bad configuration ?

Obviously master and slave have the same configuration regarding phase and polarity (and everything else since the source code is mostly identical).


Solution

  • Check the Output timing characteristics table in the datasheet.

    The binary number in the leftmost column is the value that goes in GPIO->OSPEEDR. At VDD=3.3V (That's what the Nucleo board uses), value 00 would work up to 12 MHz, that's exactly where your signal is starting to break down. Just turn it up to the maximal value, it doesn't hurt. (Well, it might overload something if you toggle lots of pins at once.)