Why am I not able to write to/read from custom AXI lite peripheral's registers
I am working with a Zynq board where a custom AXI 4 lite slave peripheral is created and then added from the IP Repository. Then these blocks have been successfully connected with Run Connection Automation. Then bit stream was generated successfully.
Further the SDK was launched. There was a blank C project with simple code for the ZYNQ PS working already. This code was altered by following the pdf "Designing a custom AXI4 lite Slave Peripheral" (the one shown in the following image).
Write and read functions for the custom AXI slave peripheral
Now the SDK executes without any error but when I observe the addresses on SDK monitor, there is no data written into it (as shown in the following image).
Where could I have gone wrong or what have I missed? Working with vhdl on Vivado 16.2.
What I have already tried: -processing with XSDB console with command
mwr -force 0x43C00000 0x01234
no change there.
Checked the Vivado Address editor to contain the same base address included
xparamters.h
Thank you very much in advance..
update: the xparameters.h file did not have the same base and high address as the vivado address editor. So tried with changing the 'memory region' in linker script to RAM from DDR enter image description here ,
now when observed in the 'variables' window, when clicked on 'Step Into' button, i do get the expected change in valuesenter image description here .. The XSDB console output and Memory monitor output remain unchanged though.
The hardware platform specification file does show the custom AXI lite with the right expected base and high address.enter image description here
Hardware_platform specified
- One of the reasons that were causing this problem was a different hardware platform associated with the debug configurations wrt to the one you want to use.
As we make some changes in the IPs and update them, when the bitstream is exported to SDK, a new hardware platform gets created . Say if the older one is TOP_WRAPPER_hw_platform_0, now a new one is created TOP_WRAPPER_hw_platform_1.
This new platform should be updated in the debug configuration settings Hardware platform.
further in debug config settings the following needed to be ticked on Under Target Setup
- Reset entire system
- Program FPGA
Under Application tab
Download Application
Stop at 'main'
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