How do I implement a 4:1 Mux in chisel without using 2:1 Muxes? Is there a way where we can select one of the inputs of the N inputs by having something like Mux(sel, A,B,C,D.......N) where N can be taken in as a parameter? I am aware of the MuxCase in chisel but I am yet to find an example that makes use of MuxCase, any sort of documentation or example regarding this is greatly appreciated. Thank You.
There are a couple of usages in rocket-chip in MultiWidthFifo.scala
It's pretty straightforward. It takes a default value for what happens if none of the supplied conditions is true, otherwise it looks through a sequence of tuples, where each tuple of the form (bool condition, result) often written condition -> result. The return value is the result from the first boolean condition that is true.
Here is a toy example of a module that passes the number of input bools into a module which then uses that value to construct a sequence of mux cases.
class UsesMuxCase(numCases: Int) extends Module {
val io = IO(new Bundle {
val output = Output(UInt(10.W))
val inputs = Input(Vec(numCases, Bool()))
})
val cases = io.inputs.zipWithIndex.map { case (bool, index) =>
bool -> index.U(10.W)
}
io.output := MuxCase(0.U(10.W), cases)
}