Who's got higher priority CPU or DMA controller?
Let's assume i have to refresh OLED screen pretty often using I2C so i want to take load from CPU and let the DMA transfer the data for me. After commanding DMA, CPU is executing next instructions untill it reaches point where it needs bus(let's say to communicate with SPI perhiperal). What happens then? Does DMA yields or the CPU waits until DMA finishes it's task?
Architecture: Cortex-M4 or M0+
I've never used Kinetis family but I think I can see the answer in their reference manuals. Let's take K12 Sub-Family Reference Manual
On the page 69 there is info about Crossbar-Light Switch Configuration (Here presentation describing it):
In the same document on the page 308:
Default mode of this switch is fixed priority (p. 301) - it means in case you presented CPU needs to wait.
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