How do I implement a 8:1 MUX using 3:8 decoders and 2 input gates?
I know how a 8:1 MUX works and how a 3:8 decoder works but I am not able to understand the approach to convert the decoder to mux using 2 input AND or OR gates.
Our Sir told this Question and the students gave the answer in split second.They said 8 AND gates and 7 OR gates are required for conversion.
What a 8:1 MUX does is selecting 1 signal out of the 8 inputs. The 3:8 decoder is where you should start with, because it can transform a 3-bit signal (the selector signal) to 8 separate signals which as a whole functions as one-hot.
Assume each input IN* is 1-bit. To implement a 8:1 MUX which:
SEL=0 selects IN0SEL=7 selects IN7use the following structure.
+-----+ +----+
IN0 ------------>| AND |-------->| |
+-------->+-----+ | |
| | OR |---> OUT
... | ... ... | |
| +-----+ | |
IN7 ---|-------->| AND |-------->| |
| +-->+-----+ +----+
s0| ... |s7
+-------+
|3:8 DEC|
+-------+
^
|
SEL[2:0]
s0=1 if SEL=0. ... s7=1 if SEL=7.
8 AND gates plus one-hot encoded s* signals permits only one IN* input pass at any given time. Please note that tall OR gate actually represents 7 OR gates. Because only 2-input gates are allowed, you need 7 OR gates to OR 8 signals together.