macosarmapple-siliconrosetta-2

What is it meant by "developers must optimise their apps to run on ARM-based processors"?


This is a subject that I am not very knowledgable about and I was hoping to get a better understanding on the topic.

I was going through articles about Apple's transition to Apple Silicon and at some point I read "Apple is going to ship Rosetta 2, an emulation layer that lets you run old apps on new Macs."

As far as I know, an application is written in a high level language (e.g. C/C++,Java etc.). Then the compiler (let's assume interpreters don't exist for a moment) reads that code and translates it to assembly code. Then the assembler will convert assembly code to machine code which is readable by the processor.

My question is, assuming the above are correct, why is Rosetta 2 required since a CPU is supposed to translate high level code into readable machine code anyway? Why would developers need to "optimise" (or care on what processor their applications are run on) their applications since they are written (mostly) in high level language (which the processor can compile) ? I don't get why would programmers care if the CPU is supposed to handle compiling and assembling.

This question is probably rather trivial but I couldn't find what I was looking for just by reading about compilers or CPU architecture.


Solution

  • a CPU is supposed to translate high level code into readable machine code anyway?

    No, the CPU doesn't do that itself, it happens via software running on the CPU (JIT or ahead-of-time compiler).

    For ahead-of-time compiler (e.g. normal C++ implementations), closed source software only ships x86 machine code, not source. So you can't just recompile it yourself. Open-source software is usually easily portable by recompiling.

    Rewritten is an overstatement for most apps, most can just recompile.

    But if you have custom x86-specific code, like manually vectorized SIMD loops using SSE / AVX intrinsics or hand-written asm, you'd have to port those to NEON / AArch64 SIMD.