gccintelcpu-architectureavx512fma

GCC inclusion of AVX512's "Fused Multiply Add" instructions when compiling for Cascade-Lake processors


According to gcc's documention, compiling with "-march=cascadelake" does not enable the flag -AVX512IFMA (which, if I understand correctly, enables support for AVX512's FMA instructions). In contrast, this flag is included for example when compiling with "-march=cannonlake" and "-march=tigerlake".

Howeover, accorindg to Intel, Cascade-Lake's processors actually include 2 AVX-512 FMA units each (here's an example, and as far as I can tell, this true for any Cascade-Lake processor).

Can anyone please clarify this behaviour? Am I misinterpreting the meaning of the AVX512IFMA flag?


Solution

  • The AVX-512 FMA units on SKX/CSX support the FMA instructions that are part of the AVX512F extensions. These instructions operate on floating-point operands. The AVX512IFMA instructions operate on 52-bit unsigned integer operands. They are different sets of instructions. Wikipedia has list of instructions in each of the AVX-512 extensions.