vhdlhdltwos-complementdigital-logic

2's complement std_logic_vector to unsigned number

I have a 4 bits std_logic_vector whose values are represented in 2's complement. And I want to extract it's unsigned value

signal FOURbits_2scomplement : std_logic_vector(3 downto 0);

signal THREEbits_number : unsigned(2 downto 0);

THREEbits_number <= what_to_do(FOURbits_2scomplement); -- here !

How can we convert the given 4 bits that we encoded/represent in 2's complement to a 3-bit binary encoded binary value?

I am stuck because of the width...

Solution

  • I would recommend you to use the numeric_std-package. It comes with types signed and unsigned. You can now just cast the std_logic_vector to one of these types (I still don't know exactly what you are going to do, but this explaination should be sufficient for you) and then compare if the value is greater or less than 2.

    To understand what I just wrote, have a look at the table at this site.

    If I got you wrong and you want to convert the number from 2's complement to binary, refer to the accepted answer of this question. In short, it is just inverting, adding 1 and cut the sign bit.