embeddedcpu-architectureavrperipheralsatmega32

I/O Data tranfer Modes and I/O addresses access

I've realized that the 3 ways to make an I/O connection :

1- Programmed I/O (polling)

2- Interrupt-Driven I/O

3- Direct Memory Access (DMA)

now, I need to relate this with the reality of how accessing I/O addresses is done

(Isolated I/O || Memory-mapped I/O) :

DMA

Memory mapping does not affect the direct memory access (DMA) for a device, because, by definition, DMA is a memory-to-device communication method that bypasses the CPU.

this is all information I have.

Am I understanding the topics right now, or there are any misconceptions?

Solution

  • Port mapped vs memory mapped (Communication)

    This is how the IO access is performed, i.e. how the CPU communicates with the device.
    With port mapped IO the CPU uses special instructions (e.g. x86's in and out) to read/write from a device in a special IO address space you can't access with load/store instructions.
    With memory mapped IO the CPU performs normal memory loads and stores to communicate with a device.
    The latter is usually more granular and uniform when it comes to security permissions and code generation.

    Polling vs Interrupt driven (Notification)

    This is how notifications from the devices are received by the CPU.
    With polling the CPU will repeatedly read a status register from the device and check if a completion bit (or equivalent) is set.
    With interrupt driven notifications the device will raise an interrupt without the need for the CPU to do any periodic work.
    Polling hogs the CPU but has less latency for some workload.

    DMA vs non-DMA (Transfer)

    This is how the data is transferred from the device to the CPU.
    With DMA the device will write directly into memory.
    Without DMA the CPU will have to read the data repeatedly (either with port or memory mapped IO).

    All these three dimensions are independent of each other, you can combine them however you like (e.g. port mapped, interrupt driven, DMA).
    Note, however, that the nomenclature is not consistent in the literature.
    Also, different devices have different interfaces that may not need all of the three dimensions (e.g. a very simple output-only GPIO pin may have a single write-only register, so it makes no sense to talk about polling or DMA in this case).