What would happen if the CPU data-bus bit 2 is connected to the RAM data-bit 5 and CPU data-bus bit 5 is connected to RAM data bit 2? Assume the rest of the connections are all right – explain.
My thoughts - I think that the second and the fifth bit of the data would be swapped in the CPU in comparison to the data coming from the RAM.
I would be very grateful if you can give some more insights and ways to think about this question.
If swapped bits were always swapped, then we'd actually never know: when the CPU stores data in RAM and reads it back, it will read the same numeric value it wrote, which is how RAM is supposed to work! We don't actually care which bit of RAM is used to store which bit of a byte — only if the system were bit addressable (it's not), could we even inspect which bit went where.
But if there are ways for content to get into the CPU or into the RAM without being swapped, i.e. without traversing that miswired data bus, then bad things would happen. For example, if there's a ROM, that is burned un-swapped, then when read via the miswired bus, it will deliver bit-crossed instructions & data, so things won't work properly, or if there's a DMA system that reads from the hard drive into memory bypassing that particular miswiring initially, but later seen by the CPU using that miswired bus.
If there's no ROM and all I/O is done via a separate properly wired I/O bus, and written by the CPU into RAM over that miswired bus, then we'd never know that the wrong bit was being used in each byte of RAM.