I am trying to simulate the PIC16F84 and now need to implement PCL / PCLATH registers.
The PIC16F84 has 1K of Program memory.
The PCL is 8Bit wide, so in this case Bit 0 and 1 of PCLATH is used to switch between the four Pages each having a size of 256B, am I right so far?
Based on this, I do not understand the following:
The Datasheet states for a GOTO:
The upper bits of PC are loaded from PCLATH<4:3>. GOTO is a two- cycle instruction.
But aren't the upper Bits of PCLATH too much? I mean there are only 4 Pages, each 256B, hence only bit 0 and 1 of PCLATH are needed. Or in other words - Bit 3 and 4 of PCLATH are always 0 ? Why would I then need to care about 'PCLATH' when performing a 'CALL' or 'GOTO' ?
PIC16F84 has 13 bit program counter (PC). GOTO and CALL instructions have 11 bit address operands and the remaining 2 bits needs to come from somewhere, which is PCLATH<4:3>. As PIC16F84 has only 1K-word program memory, you don't need to care about PCLATH when using GOTO & CALL. Even having a non-zero random value won't affect the addressing, because datasheet states that:
Accessing a location above the physically implemented address will cause a wraparound.
Still, it's best to keep PCLATH<4:3> bits clean for future compatibility to other PIC models that have bigger flash memories.
So, is PCLATH completely irrelevant for PIC16F84? No. There is one more situation where PCLATH is used: Modifiying PCL, the lower 8 bits of the PC. When PCL is modified, the remaining 5 bits of the PC comes from PCLATH<4:0>. Modifiying PCL, mostly by adding some values to it, used for creating RETLW tables, which can be used to embed arrays of constant values into flash memory. So, it's good idea to always have a proper & valid value in PCLATH.