nand2tetris

Dmux4Way is producing error in line 7: error from Hardware Simulator?


Did I miss anything or is Hardware Simulator wrong? The simulator is producing error! Please can you run this and see the error. Please can you run this and see the error. Please can you run this and see the error.

    // This file is part of www.nand2tetris.org
    // and the book "The Elements of Computing Systems"
    // by Nisan and Schocken, MIT Press.
    // File name: projects/01/DMux4Way.hdl
    
    /**
     * 4-way demultiplexor:
     * {a, b, c, d} = {in, 0, 0, 0} if sel == 00
     *                {0, in, 0, 0} if sel == 01
     *                {0, 0, in, 0} if sel == 10
     *                {0, 0, 0, in} if sel == 11
     */
    
    CHIP DMux4Way {
        IN in, sel[2];
        OUT a, b, c, d;
    
        PARTS:
        // Put your code here:
        Not(in=sel[0], out=nsel0);
        Not(in=sel[1], out=nsel1);
    
        And(a=nsel0, b=nsel1, out=outa);
        And(a=in, b=outa, out=a);
        
        And(a=nsel0, b=sel[1], out=outb);
        And(a=in, b=outb, out=b);
    
        And(a=sel[0], b=nsel1, out=outc);
        And(a=in, b=outc, out=c);
    
        And(a=sel[0], b=sel[1], out=outd);
        And(a=in, b=outd, out=d);
    
        //DMux(in=in,sel=sel[1],a=ao,b=bo);
        //DMux(in=ao,sel=sel[0],a=a,b=b);
        //DMux(in=bo,sel=sel[0],a=c,b=d);
    }

Solution

  • Your chip is producing the wrong result when in=1 and sel[2]=01 and also when in=1 and sel[2]=11 (line 8). If you single-step the simulator, you will see that when you do the tests, the output pin that gets set doesn't increment the way you want it to.

    So why is that? It has to do with misunderstanding what bits in sel are referred to by sel[0] and sel[1]. Sel[0] is the rightmost, least-significant bit in sel. Sel[1] is the leftmost, most-significant bit. Your chip assumes the opposite.

    Don't feel bad, this kind of mistake has bitten every programmer at least once.

    See also: https://en.wikipedia.org/wiki/Endianness