assemblycpucpu-architectureimmediate-operand

What are the common ways instruction decoders deal with using constants over registers in microcontrollers?


Specifically, if the assembly instruction has a constant as one of the operands, how would instruction decoder pass it to the ALU? So far I thought of three ways to do it.

So far I see drawbacks for all three of the abovementioned methods.

Do real CPU's in the microcontrollers use any of those ways? Or are there other solutions? What are they if so?


Solution

  • Pass the constant in the same bus as the address would go and separately trigger some enable 1-bit bus to signify its a constant.

    What you're describing as a 1-bit indication is called a control signal, and it is used by MUXes to select the proper input when more than one is potentially available.  A MUX is a selector — it selects between two (or more) choices.

    In C language expressions, we might write that ALUIn2 = Signal ? RegData2 : immediate, which says, under control of the 1-bit boolean Signal, choose either some register data value or the immediate.  We would have preceded that with RegData2 = reg[source2Field] and immediate = signExtend(immField).  That ?: operation is what MUXes do: select one from two (or more) choices.

    In choice made in MUXes, often one input is totally inapplicable and the other is totally appropriate.  While the control signal is dynamic, what the hardware is doing is computing, in parallel, multiple options.  It doesn't wait until it knows which one is the right choice for the current instruction, instead it computes many possible things, and then chooses the right one later.  So, a number of parallel computations are being ignored/discarded every cycle.

    However, the address bus would probably be bypassed, so as to send these data items directly to the ALU (directly modulo the MUXes and other logic, lookup and/or sign extension).  When a data item is sent between two components, we usually don't think of that as a bus, but rather wiring.  It could meet some definition of bus, however.

    The limitation on width of constant would still be present though, but that would be apparent in the instruction set architecture and machine code encodings, and an issue for programs to work with/around.  The hardware would simply have to accommodate the instruction set's largest constant size, which would usually be the same as data size (which is usually the same as address size).


    Have a completely separate bus for a constant, and a 1-bit enable bus.

    Some processors will already have a bus for one or the other of the ALU inputs.  The constant would be given access to this bus.

    Other processors will have simpler wiring feeding to the ALU inputs, but this wiring will choose between several options, and like I said above could be seen as a bus-like entity of sorts.


    Pass the constant into a free register and then pass the address of that register to the ALU.