Within a project of mine I use DMA to share data between the two cores of the STM32H747, the data comes from an ADC controlled by the core M7. While testing my DMA I noticed that the data stored within the memory by the DMA wasn't varying and noticed that my ADC does not work as intended. I wrote a testing code for my ADC for it to work in single ended mode and continuous mode. So first I init my ADC :
void ADC_Init (void) {
uint32_t ISR = *ADC_ISR;
uint32_t IER = *ADC_IER;
uint32_t CR = *ADC_CR;
uint32_t CFGR = *ADC_CFGR;
uint32_t CFGR2 = *ADC_CFGR2;
uint32_t SMPR1 = *ADC_SMPR1;
uint32_t PCSEL = *ADC_PCSEL;
uint32_t DR = *ADC_DR;
uint32_t DIFSEL = *ADC_DIFSEL;
uint32_t SQR1 = *ADC_SQR1;
uint32_t SQR2 = *ADC_SQR2;
uint32_t SQR3 = *ADC_SQR3;
uint32_t SQR4 = *ADC_SQR4;
uint32_t CSR = *ADC1_CSR;
uint32_t CCR = *ADC1_CCR;
*RCC_AHB4ENR |= (1 << 0); //Enable clock GPIO port A
*GPIOA_MODER |= (3 << 0); //Analog mode port 0
/******Enable ADC Voltage regulator******/
CR = 0x00000000; //Fin du deep power down
*ADC_CR = CR;
CR = 0x10000000; //ADC voltage regulator Enable
*ADC_CR = CR;
while (*ADC_CR & (1 << 28) != 0) {} //check volatage enable (peut etre remplacé par un :
//delayMicroseconds(5); mais c'est moins safe)
//Petit interlude Differentiel ou single ended (a faire avant ADEN)---------
DIFSEL = 0x00000000;
*ADC_DIFSEL = DIFSEL;
//digitalWrite(LEDR, LOW);
//while (!(ADC1_ISR & (1<<12))); //LDORDY: ADC LDO output voltage ready bit
/******Calibrate ADC*********/
/******Enable ADC CLOCK******/
*RCC_AHB1ENR |= (1 << 5); //ADC peripheral clock enable
//RCC_D3CCIPR&= ~(7<<16)// ADCSEL[1:0]: SAR ADC kernel clock source selection default
digitalWrite(LEDB, LOW);
delay(2000);
digitalWrite(LEDB, HIGH);
delay(2000);
digitalWrite(LEDB, LOW);
delay(2000);
digitalWrite(LEDB, HIGH);
/******Set the prescalar******/
CCR = 0x000F0000;
*ADC1_CCR = CCR;
/******Set Scan Mode Data Management and resolution******/
CFGR |= (6 << 2); //RES[2:0]: Data resolution 110=12bits
CFGR &= ~(3 << 0); //DMNGT[1:0]: Data Management configuration 00 data stored in DR only
*ADC_CFGR = CFGR;
*ADC_CFGR2 |= (1 << 5);
//ADC regular sequence register 1
SQR1 = 0x0000040; //1st conv correspond au chan 0 (00000) et on réalise une conv par sequence de 1 conv(0000)
*ADC_SQR1 = SQR1;
/******Set the Continuous Conversion, ******/
CFGR |= (1 << 13); //CONT: Single / continuous conversion mode for regular conversions
*ADC_CFGR = CFGR;
/******Set the Sampling Time for the channels in ADC_SMPRx******/
SMPR1 = (7 << 0); //SMP0[2:0]: Channel 0 sampling time selection 011: 16.5 ADC clock cycles
*ADC_SMPR1 = SMPR1;
PCSEL |= (1 << 0); //PCSEL[19:0] :Channel 0 (VINP[i]) pre selection
*ADC_PCSEL = PCSEL;
/******Set singleEnded Input******/
DIFSEL &= ~(1 << 0); //DIFSEL[19:0]: single ended mode for channel 0
*ADC_DIFSEL = DIFSEL;
}
And I start it with :
void ADC_start (void) {
uint32_t ISR = *ADC_ISR;
uint32_t IER = *ADC_IER;
uint32_t CR = *ADC_CR;
uint32_t CFGR = *ADC_CFGR;
uint32_t CFGR2 = *ADC_CFGR2;
uint32_t SMPR1 = *ADC_SMPR1;
uint32_t PCSEL = *ADC_PCSEL;
uint32_t DR = *ADC_DR;
uint32_t DIFSEL = *ADC_DIFSEL;
uint32_t SQR1 = *ADC_SQR1;
uint32_t SQR2 = *ADC_SQR2;
uint32_t SQR3 = *ADC_SQR3;
uint32_t SQR4 = *ADC_SQR4;
uint32_t CSR = *ADC1_CSR;
uint32_t CCR = *ADC1_CCR;
CR &= ~(1 << 30);
*ADC_CR = CR;
//On a deja ADCALDIF en single ended inputs mode par nos initialisations précédentes
CR = (1 << 16); //ADCALLIN calibration linéaire ET offset
*ADC_CR = CR;
//CR=0x90010001;
*ADC_CR |= (1 << 31); //Lancer une calibration ADCAL=1
//dataFromRegister=*ADC_CR;
while (*ADC_CR & (1 << 31) != 0) {
digitalWrite(LEDR, HIGH);
delay(1000);
digitalWrite(LEDR, LOW);
delay(1000);
} digitalWrite(LEDR, HIGH);
//On attends que la calibration soit complète par un reset de ADCAL
//Processus de calibration terminé (Serial.println(/*dataFromRegister,BIN*/"calibration");)
dataFromRegister=*ADC_CR;
Serial.println(dataFromRegister,BIN);
/******Enable ADC******/
*ADC_ISR |= (1 << 0); // Reset ADC ready flag
*ADC_CR |= (1 << 0); //Enable ADC
while (!(*ADC_ISR & (1 << 0))); //Wait for ready flag
*ADC_ISR |= (1 << 0);
//*ADC_CR |= (3 << 8);//11 boost if ADC Clock entre 25 et 50MHz
CR |= (1 << 2); //ADSTART
*ADC_CR = CR;
// if (*ADC_ISR & (1 << 1)) {
// CR |= (1 << 2); //ADSTART
// *ADC_CR = CR;
// }
//while(!(*ADC_ISR & (1 << 1)));
digitalWrite(LEDR, LOW);
}
Now the continuous conversion mode should start a new conversion continuously, and set the EOC (End Of Conversion) flag which I can check to go read ADC_DR (Data Register). That is what I do within my loop :
void loop() {
Serial.println("Begin Loop");
while ((*ADC_ISR & (1 << 2)) == 0) {
Serial.print(".");
delay(100);
}
dataFromADC = *ADC_DR;
*ADC_ISR|=(1<<2);
Serial.println(dataFromADC, BIN);
digitalWrite(LEDB, LOW);
}
According to the datasheet if I read the data from the ADC_DR register the EOC flag should reset himself yet this code does not work without forcing it to reset itself (and even with that it works randomly). I must admit I am quite lost here as to why it does not work, I am currently checking every bit of my code (mainly using digitalWrite to check where the code stop and without the EOC reset it stops within the EOC check but still gives me that same 100000000000 ADC_DR read no matter what signal I put on pin PA_0C). Here is how I defined my registers :
//GPIO REG----------------------------------------
volatile uint32_t* const GPIOA_MODER = (uint32_t *) 0x58020000;//Port GPIOA correspondant à l'ADC0
//--------------------ADC REGISTRES-------------------//
volatile uint32_t* const ADC_ISR = (uint32_t *) 0x40022000;//Interupt and status register
volatile uint32_t* const ADC_IER = (uint32_t *) 0x40022004;//Interupt enable register
volatile uint32_t* const ADC_CR = (uint32_t *) 0x40022008;//Control register
volatile uint32_t* const ADC_CFGR = (uint32_t *) 0x4002200C;//COnfiguration register
volatile uint32_t* const ADC_CFGR2 = (uint32_t *) 0x40022010;//2eme conf regrister
volatile uint32_t* const ADC_SMPR1 = (uint32_t *) 0x40022014; //Sample time reg (directement lié au temps de calc de l'ADC)
volatile uint32_t* const ADC_SMPR2 = (uint32_t *) 0x40022018;
volatile uint32_t* const ADC_PCSEL = (uint32_t*) 0x4002201C;//channel preselection register on choisis un chan pour la conv
volatile uint32_t* const ADC_DR = (uint32_t *) 0x40022040;//Registre où l'on stocke le resultat des conv
volatile uint32_t* const ADC_DIFSEL = (uint32_t *) 0x400220C0;
volatile uint32_t* const ADC_SQR1 = (uint32_t *) 0x40022030;
volatile uint32_t* const ADC_SQR2 = (uint32_t *) 0x40022034;
volatile uint32_t* const ADC_SQR3 = (uint32_t *) 0x40022038;
volatile uint32_t* const ADC_SQR4 = (uint32_t *) 0x4002203C;
volatile uint32_t* const ADC1_CSR = (uint32_t *) 0x40022300;//ADC1 common status register
volatile uint32_t* const ADC1_CCR = (uint32_t *)0x40022308; //ADC1 Common Control Register
//REG RCC-----------------------------------------------
volatile uint32_t* const RCC_APB4ENR = (uint32_t *) 0x580244F4;//to enable sysconf
volatile uint32_t* const RCC_AHB4ENR = (uint32_t *) 0x580244E0;
volatile uint32_t* const RCC_AHB1ENR = (uint32_t *) 0x580244D8;
volatile uint32_t* const RCC_CR = (uint32_t *) 0x58024400;
volatile uint32_t* const RCC_CFGR = (uint32_t *) 0x58024410;
volatile uint32_t* const RCC_D1CFGR = (uint32_t *) 0x58024418;
volatile uint32_t* const RCC_D2CFGR = (uint32_t *) 0x5802441C;
volatile uint32_t* const RCC_D3CFGR = (uint32_t *) 0x58024420;
volatile uint32_t* const RCC_PLLCKSELR = (uint32_t *) 0x58024428;
volatile uint32_t* const RCC_PLLCFGR = (uint32_t *) 0x5802442C;
volatile uint32_t* const RCC_PLL1DIVR = (uint32_t *) 0x58024430;
volatile uint32_t* const RCC_PLL1FRACR = (uint32_t *) 0x58024434;
volatile uint32_t* const RCC_PLL2DIVR = (uint32_t *) 0x58024438;
volatile uint32_t* const RCC_PLL2FRACR = (uint32_t *) 0x5802443C;
volatile uint32_t* const RCC_PLL3DIVR = (uint32_t *) 0x58024440;
volatile uint32_t* const RCC_PLL3FRACR = (uint32_t *) 0x58024444;
volatile uint32_t* const RCC_CIER = (uint32_t *) 0x58024460;
I must say I am no longer sure about the ADC1_CCR address, in the datasheet they say to add a 0x300 offset to the master base address, I considered the base address to be the address of ADC1-ADC2 as referenced page 140 of the datasheet : https://www.st.com/resource/en/reference_manual/dm00176879-stm32h745755-and-stm32h747757-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
However if I misunderstood what the master address for ADC1 and ADC2 is that would explain a lot of things as the clock would no longer be defined.
I will keep trying and I welcome any piece of advice.
Here the working code (I switched to CMSIS) there were quite a lot of errors in my first version it also seems to only work on PA0_C if I use ADC2 and not ADC1:
#include <Arduino.h>
#define HWREG(x) (*((volatile uint32_t *)(x)))
// put your setup code here, to run once:
void GPIOH_Init();
void GPIOH_Port15_Toggle();
//void SystemClock_Config();
void SystemCLCKInit();
//void SysPinConfig(); //For future tests of ADC with EXTI1 IT (put the pin setup PA0 PA0_C here as well)
void ADC_start();
void ADC_Init();
//void VREFBUF_Init();
//void ADC_Reset();
uint32_t dataFromADC = 0;
int dataFromRegister = 0;
int nbSamples = 0;
void setup() {
Serial.begin(115200);
SystemCLCKInit();
// put your setup code here, to run once:
//SystemClock_Config();
GPIOH_Init();
digitalWrite(LEDR, LOW);
delay(1000);
VREFBUF_Init();
digitalWrite(LEDR, HIGH);
digitalWrite(LEDB, LOW);
delay(1000);
ADC_Init();
//analogReference(EXTERNAL);
digitalWrite(LEDB, HIGH);
digitalWrite(LEDG, LOW);
delay(1000);
ADC_Start();
digitalWrite(LEDG, HIGH);
digitalWrite(LEDB, LOW);
}
void loop() {
// put your main code here, to run repeatedly:
while(ADC_ISR_EOC & ADC_ISR_EOC_Msk!=1){//check end of conversion
// dataFromRegister=READ_REG(ADC2->ISR);
// Serial.print("Flag :");
// Serial.println(dataFromRegister,BIN);
//delay(100);
}dataFromADC = READ_REG(ADC2->DR);
Serial.print("ADC_DR:");
Serial.println(dataFromADC);
GPIOH_Port15_Toggle();
}
void VREFBUF_Init(void) {
SET_BIT(RCC->APB4ENR,RCC_APB4ENR_VREFEN_Msk);
//RCC_APB4ENR_VREFEN;
//RCC->APB4ENR|=(1<<RCC_APB4ENR_VREFEN_Msk);
delay(1000);
dataFromRegister=READ_REG(RCC->APB4ENR);
Serial.print("CLCK : ");
Serial.println(dataFromRegister,BIN);
delay(1000);
SET_BIT(VREFBUF->CSR,VREFBUF_CSR_ENVR_Msk);
CLEAR_BIT(VREFBUF->CSR,VREFBUF_CSR_HIZ_Msk);
while(VREFBUF_CSR_VRR & VREFBUF_CSR_VRR_Msk !=1){
dataFromRegister=READ_REG(VREFBUF->CSR);
Serial.println(dataFromRegister,BIN);
}
}
void ADC_Init(void) {
/***************CLOCK and PIN config******************/
// MODIFY_REG(RCC->D3CCIPR,RCC_D3CCIPR_ADCSEL_Msk,0x1L);
// delay(1000);
// dataFromRegister=READ_REG(RCC->D3CCIPR);
// Serial.print("D3CCIPR :");
// Serial.println(dataFromRegister,BIN);
SET_BIT(RCC->APB4ENR,RCC_APB4ENR_SYSCFGEN_Msk);
delay(1000);
dataFromRegister=READ_REG(RCC->APB4ENR);
Serial.print("RCC_APB4ENR:");
Serial.println(dataFromRegister,BIN);
SET_BIT(RCC->APB4ENR,RCC_APB4ENR_RTCAPBEN_Msk);
delay(1000);
dataFromRegister=READ_REG(RCC->APB4ENR);
Serial.print("RCC_APB4ENR1:");
Serial.println(dataFromRegister,BIN);
SET_BIT(RCC->AHB1ENR,RCC_AHB1ENR_ADC12EN_Msk);
delay(1000);
dataFromRegister=READ_REG(RCC->AHB1ENR);
Serial.print("RCC_AHB1ENR:");
Serial.println(dataFromRegister,BIN);
//GPIOA PORT 1------------------------------------
SET_BIT(RCC->AHB4ENR,RCC_AHB4ENR_GPIOAEN_Msk);
delay(1000);
dataFromRegister=READ_REG(RCC->AHB4ENR);
Serial.print("RCC_AHB4ENR:");
Serial.println(dataFromRegister,BIN);
SET_BIT(GPIOA->MODER, GPIO_MODER_MODE1_0);
SET_BIT(GPIOA->MODER, GPIO_MODER_MODE1_1);
CLEAR_BIT(GPIOA->PUPDR, GPIO_PUPDR_PUPD1_0);
CLEAR_BIT(GPIOA->PUPDR, GPIO_PUPDR_PUPD1_1);
SET_BIT(SYSCFG->PMCR, SYSCFG_PMCR_PA0SO_Msk);
delay(1000);
dataFromRegister=READ_REG(SYSCFG->PMCR);
Serial.print("SYSCFG->PMCR:");
Serial.println(dataFromRegister,BIN);
SET_BIT(RCC->AHB1ENR,RCC_AHB1ENR_ADC12EN_Msk);
delay(1000);
dataFromRegister=READ_REG(RCC->AHB1ENR);
Serial.print("RCC->AHB1ENR2:");
Serial.println(dataFromRegister,BIN);
/***************ADC not Enabled yet********************/
//ADC VOLTAGE REGULATOR-----------------------------
CLEAR_BIT(ADC2->CR,ADC_CR_DEEPPWD_Msk);
//dataFromRegister=READ_REG(ADC2->CR);
//Serial.print("ADCR: ");
//Serial.println(dataFromRegister,BIN);
//delay(1000);
SET_BIT(ADC2->CR,ADC_CR_ADVREGEN_Msk);
delay(1000);
dataFromRegister=READ_REG(ADC2->CR);
Serial.print("ADCAL: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
//
//ADC CALIBRATION-----------------------------------
CLEAR_BIT(ADC2->CR,ADC_CR_ADCALDIF_Msk);
SET_BIT(ADC2->CR,ADC_CR_ADCALLIN_Msk);
SET_BIT(ADC2->CR,ADC_CR_ADCAL_Msk);
while(ADC_CR_ADCAL & ADC_CR_ADCAL_Msk!=0){
dataFromRegister=READ_REG(ADC2->CR);
Serial.print("ADC2_CR: ");
Serial.println(dataFromRegister,BIN);
}
//ADC prescaler selection clock and sample time delay
//MODIFY_REG(ADC22_COMMON->CCR,ADC_CCR_CKMODE | ADC_CCR_PRESC | ADC_CCR_DELAY ,0x3UL | 0x3UL | 0x8UL);
SET_BIT(ADC12_COMMON->CCR, ADC_CCR_CKMODE_0 | ADC_CCR_CKMODE_1 | ADC_CCR_PRESC_0 | ADC_CCR_PRESC_1 | ADC_CCR_DELAY_3);
// MODIFY_REG(ADC12_COMMON->CCR,ADC_CCR_PRESC_Msk,0x3UL);
// MODIFY_REG(ADC12_COMMON->CCR,ADC_CCR_DELAY_Msk,0x8UL);
dataFromRegister=READ_REG(ADC12_COMMON->CCR);
Serial.print("ADC_CCR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
//Set input mode------------------------------------
CLEAR_BIT(ADC2->DIFSEL,ADC_DIFSEL_DIFSEL_0);
/*******************ADC Enable**********************/
SET_BIT(ADC2->ISR,ADC_ISR_ADRDY_Msk);
SET_BIT(ADC2->CR,ADC_CR_ADEN_Msk);
while(ADC_ISR_ADRDY & ADC_ISR_ADRDY_Msk !=1){}
SET_BIT(ADC2->ISR,ADC_ISR_ADRDY_Msk);
/********************ADC Enabled********************/
//ADC CFGR------------------------------------------
SET_BIT(ADC2->CFGR, ADC_CFGR_RES_2 | ADC_CFGR_RES_1 | ADC_CFGR_OVRMOD_Msk | ADC_CFGR_CONT_Msk);
CLEAR_BIT(ADC2->CFGR, ADC_CFGR_DMNGT_0 | ADC_CFGR_DMNGT_1 | ADC_CFGR_RES_0 | ADC_CFGR_EXTEN_0 | ADC_CFGR_EXTEN_1);
//DATA ALIGNEMENT-----------------------------------
// ADC PCSEL----------------------------------------
SET_BIT(ADC2->PCSEL,ADC_PCSEL_PCSEL_0);
//ADC SQR1------------------------------------------
//SET_BIT(ADC2->SQR1,ADC_SQR1_SQ1_1);
//ADC SMPR1-----------------------------------------
SET_BIT(ADC2->SMPR1,ADC_SMPR1_SMP0_0 | ADC_SMPR1_SMP0_1);
}
void ADC_Start(void) {
SET_BIT(ADC2->CR,ADC_CR_ADSTART_Msk);
}
void GPIOH_Init(void) {
SET_BIT(RCC->AHB4ENR,RCC_AHB4ENR_GPIOHEN_Msk);
delay(1000);
SET_BIT(GPIOH->MODER, GPIO_MODER_MODE15_0);
CLEAR_BIT(GPIOH->MODER, GPIO_MODER_MODE15_1);
CLEAR_BIT(GPIOH->OTYPER, GPIO_OTYPER_OT15);
}
void GPIOH_Port15_Toggle(void) {
SET_BIT(GPIOH->BSRR, GPIO_BSRR_BS15);
CLEAR_BIT(GPIOH->BSRR, GPIO_BSRR_BS15);
SET_BIT(GPIOH->BSRR, GPIO_BSRR_BR15);
CLEAR_BIT(GPIOH->BSRR, GPIO_BSRR_BR15);
}
void SystemCLCKInit(void) {
/* Enable the floating-point unit. Any configuration of the
floating-point unit must be done here prior to it being enabled */
HWREG(0xE000ED88) = ((HWREG(0xE000ED88) & ~0x00F00000) | 0x00F00000);
/*------- Reset the RCC clock configuration to the default reset state -------*/
/* Set HSION bit */
RCC->CR |= 0x00000001;
dataFromRegister=READ_REG(RCC->CR);
Serial.print("CR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
dataFromRegister=READ_REG(RCC->CFGR);
Serial.print("RCC->CFGR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset HSEON, CSSON , CSION,RC48ON, CSIKERON PLL1ON, PLL2ON and PLL3ON bits */
RCC->CR &= (uint32_t)0xEAF6ED7F;
dataFromRegister=READ_REG(RCC->CR);
Serial.print("RCC->CR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset D1CFGR register */
RCC->D1CFGR = 0x00000000;
dataFromRegister=READ_REG(RCC->D1CFGR);
Serial.print("RCC->D1CFGR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset D2CFGR register */
RCC->D2CFGR = 0x00000000;
dataFromRegister=READ_REG(RCC->D2CFGR);
Serial.print("RCC->D2CFGR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset D3CFGR register */
RCC->D3CFGR = 0x00000000;
dataFromRegister=READ_REG(RCC->D3CFGR);
Serial.print("RCC->D3CFGR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLLCKSELR register */
RCC->PLLCKSELR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLLCKSELR);
Serial.print("RCC->PLLCKSELR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLLCFGR);
Serial.print("RCC->PLLCFGR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLL1DIVR register */
RCC->PLL1DIVR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLL1DIVR);
Serial.print("RCC->PLL1DIVR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLL1FRACR register */
RCC->PLL1FRACR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLL1FRACR);
Serial.print("RCC->PLL1FRACR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLL2DIVR register */
RCC->PLL2DIVR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLL2DIVR);
Serial.print("RCC->PLL2DIVR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLL2FRACR register */
RCC->PLL2FRACR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLL2FRACR);
Serial.print("RCC->PLL2FRACR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLL3DIVR register */
RCC->PLL3DIVR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLL3DIVR);
Serial.print("RCC->PLL3DIVR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset PLL3FRACR register */
RCC->PLL3FRACR = 0x00000000;
dataFromRegister=READ_REG(RCC->PLL3FRACR);
Serial.print("RCC->PLL3FRACR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
dataFromRegister=READ_REG(RCC->CR);
Serial.print("RCC->CR: ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Disable all interrupts */
RCC->CIER = 0x00000000;
dataFromRegister=READ_REG(RCC->CIER);
Serial.print("RCC->CIER : ");
Serial.println(dataFromRegister,BIN);
delay(1000);
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
HWREG(0x51008108) = 0x000000001;
}
Thanks for the help somehow redefining everything with CMSIS highlighted some of my mistakes.