There are two flavors of a variable in GNU Make: "recursively expanded" and "simply expanded". VARIABLE:=VALUE yields simple expansion in Makefile but seems to yield recursive expansion in Makefile.am. Here is an example. GNU Make outputs common after running it with the following snippet in Makefile.
a = common
b := $(a)
a = A
$(info $(b))
When I put the same snippet into Makefile.am, autotools generate a Makefile containing the following code.
a = A
b := $(a)
...
$(info $(b))
Naturally, this time Make outputs A. I want to have Make output common. Is there a way to use the simple expansion semantics in Makefile.am? (There is no original problem I want to solve: I've stumbled across this question several times and want to understand how variables work in Automake scripts better).
Generally, you can't.
First, a primary goal of automake is to generate makefiles that conform to the POSIX definition of make, so that the makefiles so output do not require GNU make.
Second, as described in the General Operation section of automake, simple variables are explicitly warned about as non-standard / non-portable. And in any event, as described there as well, the generated Makefile.in is rearranged from the Makefile.am to put all the variables first in the output; that means that any overriding of the same variable will be condensed into a single value (as you've seen in your experiments).