Is it possible to sample LOAD and STORE instructions at the same time in Intel PEBS sampling?

I am trying to use the Intel PMU performance monitoring (PEBS) to sample all LOAD and STORE operations in a C/C++ application binary. The codebase I am using uses perf_event_open() to set up the monitoring for either LOAD or STORE in the attr->config field as shown in the code snippet below. I want to add another switch case to sample LOAD_AND_STORE operations. But I don't know how to config this attr->config field to the appropriate HEX value for Intel PMU like the values currently present in the code snippet for either LOAD or STORE. I would appreciate any pointers or help. Thanks in advance.

switch(aType)
    {
        case LOAD:
        {
/* comment out by Me
//          attr->config                 = 0x1cd;
#if defined PEBS_SAMPLING_L1_LOAD_MISS
            //attr->config                 = 0x5308D1; // L1 load miss
            attr->config             = 0x8d1; // perf stat -e mem_load_uops_retired.l1_miss -vvv ls  // for broadwell
#elif defined PEBS_SAMPLING_LLC_LOAD_MISS
            attr->config                 = 0x5320D1; // LLC load miss
#else 


            attr->config                 = 0x5381d0; //All Load
#endif
*/
//          attr->config                 = 0x5308D1; // L1 load miss
//          attr->config                 = 0x5320D1; // LLC load miss
//                        attr->config1                = 0x3;

// added by me
                        attr->config                 = 0x5381d0; //All Load added by me 
                        attr->precise_ip             = 3;
            load_flag = true;
            break;
        }
        case STORE:
        default:
        {
                attr->config                 = 0x5382d0;//0x2cd;
//          attr->config             = 0x8d1;   //mem_load_uops_retired.l3_miss
//              attr->config1                = 0x0;
                attr->precise_ip             = 3;
            store_flag = true;
            break;
        }
    }

        attr->read_format            = PERF_FORMAT_GROUP | PERF_FORMAT_ID;
//        attr->task                   = 1;

    // fresh creation
//  return registerDevice(sessionId);
}

Yes, there is a way to measure all "LOAD_AND_STORE" instructions using the PEBS facility.

The raw event you are looking for MEM_INST_RETIRED.ANY. The specification for this event for Skylake microarchitecture is defined here.

The umask for this event is 0x83 and the event code is 0xD0. So the resultant perf event config that you are looking for is attr->config = 0x5383d0.