What does the "P" prefix stand for in the x86 instruction PCLMULQDQ?

In the Carry-less Multiplication x86 instruction, PCLMULQDQ, what does the "P" prefix stand for?

I've looked in these sources, but none of them explain the mnemonics.

• https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=clmul
• https://www.felixcloutier.com/x86/pclmulqdq
• https://en.wikipedia.org/wiki/CLMUL_instruction_set

Secondly, what does "QDQ" stand for?

P is for Packed (integer). All SSE/AVX integer instructions have mnemonics starting with p, like paddb. (Or vp for the AVX versions). As opposed to ...ps (packed-single) and ...pd packed-double instructions.

Q for Quad-word (64-bit) chunks of the source operand multiplying into a Double-Quad (128-bit) integer.

Thus P CLMUL Q DQ. (There aren't other size combinations of clmul at the moment, but it's not a bad thing for the mnemonic to specify.)

FP instructions skip the leading p, and instead use suffixes like ps (packed single-precision) or sd (scalar double). e.g. vaddpd is the AVX/AVX-512/AVX10 version of ADD Packed Double.

Related:

• What comes after QWORD? including meaning of mnemonics like punpcklqdq as an example of where dq is used instead of o (octword like scalar cqo), for interleaving 64-bit chunks to make a 128-bit, following the same pattern as punpcklwd (16 bit interleave).
• How can Microsoft say the size of a word in WinAPI is 16 bits? the 8086 history of "word" being 16-bit in x86, not rewriting the documentation for 386 or x86-64. It gets baked into many mnemonics like scalar cbw as well as SIMD element sizes.
• What's the size of a QWORD on a 64-bit machine? (the terminology depends on the ISA.)
• What are the names and meanings of the intrinsic vector element types, like epi64x or pi32? focuses on intrinsic names, not asm mnemonics.
• Meaning of suffix "x" in intrinsics like "_mm256_set1_epi64x" - more intrinsics stuff.