How to check if write channel in AXI is working fine in my testbench?

I want to write on AXI memory by an AXI master vip and check if the write has been done correctly without reading it back by AXI master. I just want to check if a transaction has been written correctly, how to do that ? I know I can check data integrity by writing on the memory by AXI master VIP and also updating a local memory model and then reading it back by the AXI master and comparing the read data with the one in the local memory model but I don't want to do AXI read here, just want to check write channel is working fine, how to do that ?

If you do not want to do Read from AXI Master then you can implement backdoor read and confirm data integrity.