What is the canonical mapping between DWARF register numbers and MIPS32 CPU registers, please? The first 32 ones are the general purpose registers, but what about beyond that (e. g. lo/hi)?
A link to an authoritative document would be most welcome. DWARF proper doesn't document this kind of thing, it's usually a part of the ABI, but the ABI handbook doesn't seem to mention DWARF.
The best I could find so far is mips-tdep.h in the GDB sources. I don't think it covers all the MIPS extensions out there, but the floating point registers (relevant for userland program debugging) are there. The enum goes:
enum
{
MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
MIPS_AT_REGNUM = 1,
MIPS_V0_REGNUM = 2, /* Function integer return value. */
MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call. */
MIPS_S2_REGNUM = 18, /* Contains return address in MIPS16 thunks. */
MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
MIPS_GP_REGNUM = 28,
MIPS_SP_REGNUM = 29,
MIPS_RA_REGNUM = 31,
MIPS_PS_REGNUM = 32, /* Contains processor status. */
MIPS_EMBED_LO_REGNUM = 33,
MIPS_EMBED_HI_REGNUM = 34,
MIPS_EMBED_BADVADDR_REGNUM = 35,
MIPS_EMBED_CAUSE_REGNUM = 36,
MIPS_EMBED_PC_REGNUM = 37,
MIPS_EMBED_FP0_REGNUM = 38,
MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME. */
MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */
MIPS_PRID_REGNUM = 89, /* Processor ID. */
MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */
};