Searched the Intel Manuals but couldn't find any internal descriptions of the reserved RFLAGS 32-63 bits.
In this godbolt demo, when executed in 64-bit mode, the output displays the current state of the RFLAGS register, with bits 32-63 set to 0.
Bit 0 - Carry Flag (CF): 0
Bit 1 - Reserved, always 1 in EFLAGS: 1
Bit 2 - Parity Flag (PF): 0
Bit 3 - Reserved: 0
Bit 4 - Adjust Flag (AF): 0
Bit 5 - Reserved: 0
Bit 6 - Zero Flag (ZF): 0
Bit 7 - Sign Flag (SF): 0
Bit 8 - Trap Flag (TF): 0
Bit 9 - Interrupt-enable Flag (IF): 1
Bit 10 - Direction Flag (DF): 0
Bit 11 - Overflow Flag (OF): 0
Bit 12 - I/O Privilege Level (IOPL) - low bit: 0
Bit 13 - I/O Privilege Level (IOPL) - high bit: 0
Bit 14 - Nested Task (NT): 0
Bit 15 - Mode flag (MD) - Reserved: 0
Bit 16 - Resume Flag (RF): 0
Bit 17 - Virtual 8086 Mode (VM): 0
Bit 18 - Alignment Check/Access Control (AC): 0
Bit 19 - Virtual Interrupt Flag (VIF): 0
Bit 20 - Virtual Interrupt Pending (VIP): 0
Bit 21 - ID Flag (ID): 0
Bit 22 - Reserved: 0
Bit 23 - Reserved: 0
Bit 24 - Reserved: 0
Bit 25 - Reserved: 0
Bit 26 - Reserved: 0
Bit 27 - Reserved: 0
Bit 28 - Reserved: 0
Bit 29 - Reserved: 0
Bit 30 - AES key schedule loaded flag (none): 0
Bit 31 - Alternate Instruction Set (AI): 0
Bit 32 - Reserved: 0
Bit 33 - Reserved: 0
Bit 34 - Reserved: 0
Bit 35 - Reserved: 0
Bit 36 - Reserved: 0
Bit 37 - Reserved: 0
Bit 38 - Reserved: 0
Bit 39 - Reserved: 0
Bit 40 - Reserved: 0
Bit 41 - Reserved: 0
Bit 42 - Reserved: 0
Bit 43 - Reserved: 0
Bit 44 - Reserved: 0
Bit 45 - Reserved: 0
Bit 46 - Reserved: 0
Bit 47 - Reserved: 0
Bit 48 - Reserved: 0
Bit 49 - Reserved: 0
Bit 50 - Reserved: 0
Bit 51 - Reserved: 0
Bit 52 - Reserved: 0
Bit 53 - Reserved: 0
Bit 54 - Reserved: 0
Bit 55 - Reserved: 0
Bit 56 - Reserved: 0
Bit 57 - Reserved: 0
Bit 58 - Reserved: 0
Bit 59 - Reserved: 0
Bit 60 - Reserved: 0
Bit 61 - Reserved: 0
Bit 62 - Reserved: 0
Bit 63 - Reserved: 0
Modifying RFLAGS Test
From Manual alteration of RFLAGS register
pushfq
pop rax ; rax = 202
xor rax,0FFFFFFFFCAFEBABEh
push rax ; rax = ffffffffcafeb8bc
popfq
pushfq
pop rax ; rax = 200a96
After the popfq instruction, the lower 32-bits were modified (caused weird program behavior too) but the reserved upper 32-bits were unaffected.
As the answer notes:
Those flags are reserved, and are always 0. Writing 1s into them is currently ignored - they stay zero anyway.
Those flags are reserved, and are always 0. Writing 1s into them is currently ignored - they stay zero anyway. It is possible, that those flags do not even exist in hardware.
Most likely, they were added to keep the stack 8 byte aligned when the CPU pushes RFLAGS in 64-bit mode. Future CPUs might find a use for those bits, so using them for some funny business is not recommended.