[SOLVED] qemu risc-v interrupt not handled : time_lo write not implemented , time

qemu risc-v interrupt not handled : time_lo write not implemented , time_hi write not implemented

Recently, as I simulated a RISC-V 64 processor with a single CPU and 128MB of memory, I encountered a warning, resulting in the timer interrupt no longer managed.

The warning :

qemu-system-riscv64: clint: time_lo write not implemented
qemu-system-riscv64: clint: time_hi write not implemented

I'm emulating with this comand :

qemu-system-riscv64 -device VGA -machine virt -nographic -cpu rv64 -smp 1 -m 128M  -serial mon:stdio  -bios none -kernel kernel.elf

And compiling with :

riscv64-unknown-elf-gcc build/*.o boot.S  -ffreestanding -nostartfiles -nostdlib -nodefaultlibs -g -Wl,--gc-sections -mcmodel=medany -march=rv64g -Wl,--no-warn-rwx-segments -T kernel.ld -o kernel.elf

I tried to read about devicetree blob but I think that is not related to that.

Solution

That warning message was removed in upstream QEMU by implementing the correct behaviour for those writes in QEMU commit e2f01f3c2e13 in April 2022. If you use a newer version of QEMU (7.1.0 or later) you should hopefully find that these warnings go away.