My goal is to match all pipeline values (all the signals at the microarchitectural states in the processor) produced by the execution of the corresonding instruction for a scalar, in-oder RISCV processor.
It was considered to use pc value, because we would have this pc at every pipeline stage, then we'd know at this point of time, all the signals generated in this stage are attributed to the instruction at the address of this pc value. However, this cannot be true any more. When the same instruction is being executed many times, such as in a while loop, how do we match the corresponding pipeine values with the right instance of the instruction? Because pipeline values will be updated after each instance of the same instruction as well, but all instances will have the same pc value, as it is the same instruction, yet the microarchitectural states will be different.
Create a theoretical execution number for each instruction (starts at zero for each instruction, increments at each fetch of that instruction at that address/pc) and use that execiution number along with the pc, to track.