Is there a max size to MIPS static data segment?
This echoes another very similar question about a different memory segment - I figure the answer is the same, but I want to ask to confirm.
For the software convention (not the actual MIPS architecture) specified in Patterson & Hennessey, is all static data supposed to fit between 0x10000000 - 0x10008000?
Solution
In this memory model, the static data section size is only limited by running into the stack. It starts at 0x1000 0000, and the $gp CPU register holds value 0x1000 8000. This means that you can reach 0x1000 0000 to 0x1001 0000 in one instruction (e.g. lw or sw) using that gp register as the base. Static data can certainly be located past 0x1001 0000, just may need multiple instructions to access those locations.
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