Using Chisel Submodule within another Module: Cannot assign variables to the io input

I am trying to create a simple counter, which counts how many seconds have passed up until and including some max_count_S.

To simplify the process I have first created a "signal" counter, which uses the clock to count, counting only when the signal input is high.

import chisel3._


/*
  |While signal is active, it counts [start,max_count] clock cycles.
*/
class SignalCounter(start_value: Int = 0, width: Int, max_count: Int) extends Module {
  val io = IO(new Bundle {
    val signal = Input(Bool())
    val out = Output(UInt(width.W))
  })

  val counter_reg = RegInit(start_value.U(width.W))

  when(io.signal)
  {
    //Whenever we get the signal; Update the counter_reg
    counter_reg := Mux(counter_reg === max_count.U(width.W),0.U ,counter_reg + 1.U)
  }

  io.out := counter_reg
}

My aim is to have two of these; one whose max_count is equal to the number of clock cycles per second minus 1, such that it outputs 0 every time a second has passed. I then wish to have a second one, whose signal is high everytime the first one's is 0, such that it counts how many seconds have passed.

I tried implementing that here:

import chisel3._

import scala.math._

def calculateBitsNeeded(N: Int): Int = {
  ceil(log10(N.toDouble + 1) / log10(2)).toInt
}


/*
  arg: cc_to_S: Number of clock cycles per second
 */
class TimeCounter(cc_to_S: Int = (100000000-1),timestep_S: Int = 0, width: Int, max_count_S: Int) extends Module {
  val io = IO(new Bundle {
    val out_s = Output(UInt(width.W))
  })


  val sig_counter_clock = new SignalCounter(max_count = cc_to_S, width =calculateBitsNeeded(cc_to_S)) //we take the cc_to_S - 1, because we want to it to tick every clock cycle we hit 1 second, not after.
  val sig_counter_S = new SignalCounter(max_count = max_count_S, width = calculateBitsNeeded(max_count_S))

  sig_counter_clock.io.signal = true.B
}

But I get the following error:

Reassignment to val

Is there any way I can assign the io pins within the module?

This question is not about the architecture of my solution; Simply about how to interface .io pins within modules.

Module instance must be encapsulated in Module() like this :

val sig_counter_clock = Module(new SignalCounter(max_count = cc_to_S, width =calculateBitsNeeded(cc_to_S))) //we take the cc_to_S - 1, because we want to it to tick every clock cycle we hit 1 second, not after.
val sig_counter_S = Module(new SignalCounter(max_count = max_count_S, width = calculateBitsNeeded(max_count_S)))