It is possible to achieve this in a cortex-m4? What i mean is having PSP only on that intervals, and all the rest MSP when there is an interrupt?
The objective is just to do the stacking and unstacking on a diferent memory location!
On exception entry the context is saved to the stack which was currently in use by the processor at the time. If you were running in main context then this could be MSP or PSP depending on the SPSEL bit of the CONTROL special register.
During exception handling only the MSP is used.
When returning from a nested interrupt to an outer interrupt then the context is restored from the MSP.
When returning from an exception to main context you can choose which stack context is restored from by setting bit[2] of the special return address written to the program counter.
You can of course change where either or both of the stack pointers point while you are in interrupt context.
See section B1.5 of the ARMv7-M Architecture Reference Manual for full details.