Configuring the STM32F407VET6 ADC using CMSIS

I'm trying to configure the ADC of the STM32F407VET6 microcontroller. I use the following code.

int main(void)
{
    // GPIOF Clock enable
    RCC->AHB1ENR |= RCC_AHB1ENR_GPIOFEN;
    // Analog modes on PF3, PF4, PF5, PF6, PF7, PF8
    GPIOF->MODER = ( 3 << 16 ) | ( 3 << 14 ) | ( 3 << 12 ) | ( 3 << 10 ) | ( 3 << 8 )  | ( 3 << 6 );
    // ADC3 Clock enable
    RCC->APB2ENR |= RCC_APB2ENR_ADC3EN;
    // ADC3 Sequence: ADC3_IN9, ADC3_IN14, ADC3_IN15, ADC3_IN4, ADC3_IN5, ADC3_IN6
    ADC3->SQR3 = ( 9 << 0 ) | ( 14 << 5 ) | ( 15 << 10 ) | ( 4 << 15 ) | ( 5 << 20 ) | ( 6 << 25 );
    // ADC3 Sequence length = 5
    ADC3->SQR1 = ( 5 << 20 );
    // 56 cycles time selection on all of ADC3 channels
    ADC3->SMPR1 = ( 3 << 0 ) | ( 3 << 3 ) | ( 3 << 6 ) | ( 3 << 9 ) | ( 3 << 12 ) | ( 3 << 15 ) | ( 3 << 18 ) | ( 3 << 21 ) | ( 3 << 24 );
    ADC3->SMPR2 = ( 3 << 0 ) | ( 3 << 3 ) | ( 3 << 6 ) | ( 3 << 9 ) | ( 3 << 12 ) | ( 3 << 15 ) | ( 3 << 18 ) | ( 3 << 21 ) | ( 3 << 24 ) | ( 3 << 27 );
    // Continuous conversion
    ADC3->CR2 |= ADC_CR2_CONT;
    // EOC event after each conversion
    ADC3->CR2 |= ADC_CR2_EOCS;
    // Scan sequence
    ADC3->CR1 |= ADC_CR1_SCAN;
    // End-of-conversion interrupt enable
    ADC3->CR1 |= ADC_CR1_EOCIE;
    // Global ADC interrupt enable
    NVIC_EnableIRQ (ADC_IRQn);
    // Start conversion on ADC3
    ADC3->CR2 |= ADC_CR2_SWSTART;
    while(1) {}
}

int adc_data;

void ADC_IRQHandler(void) {
    if(ADC3->SR & ADC_SR_EOC) {
        ADC3->SR &= ~ADC_SR_EOC;
    }
}

After compilation and firmware, I put a breakpoint inside the ADC_IRQHandler interrupt handler and wait for the input to the interrupt handler to be intercepted. In my opinion, after each conversion of each channel, an interrupt handler should be called. But there is no entry into the handler, even once. I couldn't find examples of configuring my ADC operation scenario on the Internet, I've been rereading the manual for a week now and varying the code - no changes. What could be the problem?

1. No delay after enabling clocks (refer to RCC peripheral documentation)
2. ADC is not enabled - so it will not work (ADCON bit CR2 register)
3. Analogue part clock has to be < 30MHz (I do not know what is PCLK clock)